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Mentor Graphics Introduces Catapult SL, the First High-Level Synthesis Tool to Create High-Performance Subsystems from Pure ANSI C++
WILSONVILLE, Ore.—(BUSINESS WIRE)—June 12, 2006—
Mentor Graphics Corporation (Nasdaq:MENT) today expanded
the Catapult(R) product line with Catapult SL (System Level), the
first high-level synthesis tool to automatically create
high-performance multi-block subsystems from pure sequential ANSI C++.
The Catapult SL tool supports complex hierarchical design, includes
new technology that improves block-level performance and offers links
to power analysis tools to help reduce power consumption by up to 30
percent.
Designed with high-performance applications in mind, Catapult SL
moves beyond block-level synthesis to automatically create entire
signal processing subsystems tuned to the design's specific needs. A
hierarchical design engine enables Catapult SL to coordinate the
operations of multiple blocks within the subsystem and automatically
synthesize appropriate inter-block channels and memory buffers,
leading to performance levels not easily achieved with hardware C
languages or block-level synthesis methodologies. Catapult SL also
integrates carry-save adder, a design technique for streamlining
computations and throughput to increase the performance of individual
blocks. Carry-save adder functionality enables Catapult SL to create
higher-performance hardware blocks while decreasing hardware size.
In contrast, high-level synthesis tools that input hardware
languages like SystemC require designers to embed structural details
in their source code. Manually inserting channels, memory buffers and
interface timing not only requires more up-front design effort, it
also effectively locks in a specific implementation and makes
subsystem exploration impossible. After conducting this time-consuming
process, designers must live with performance bottlenecks in the form
of sub-optimal inter-block channel bandwidths and overbuilt memory
buffers. While this manual approach to subsystem design works for some
applications, Catapult SL offers an automated way to eliminate these
bottlenecks and achieve aggressive performance and time to market
goals for high-performance video and wireless designs.
New Flows for Power Analysis and Formal Verification
The latest member of the Catapult family also adds automated power
analysis capabilities. In customer usage, Catapult SL has demonstrated
the ability to reduce power consumption by up to 30 percent.
Push-button links to leading third-party power analysis tools make it
easy for designers to create multiple subsystem implementations with
Catapult SL. Designers can then quickly evaluate the different
implementations to find the most power-efficient design. Catapult SL
also links to leading formal equivalence checking tools to verify
correctness between pure ANSI C++ descriptions and RTL
implementations, and to leading simulators, allowing automated
evaluation of tradeoffs in functionality, performance and area.
"With data and video/imaging becoming standard in next-generation
communications applications, many designers are hungry for higher
signal-processing performance," said Simon Bloch, general manager of
the Mentor Graphics Design Creation and Synthesis Division. "The new
functionality provided by Catapult SL starts with the productivity
improvements inherent in the Catapult family, and adds capacity and
intelligent design techniques that will help bridge the performance
gap between off-the-shelf DSPs and the needs of tomorrow's complex
systems."
The initial member of the Catapult product family, Catapult C
Synthesis, was the first to synthesize pure ANSI C++ to RTL. Pure ANSI
C++ is devoid of hardware constructs, allowing the Catapult tools to
create RTL for both ASIC and FPGA technologies. The Catapult tools'
incremental design methodology gives the designer visibility and
control during the entire synthesis process, allowing for interactive
design exploration at every transformation. Further, the Catapult
tools' patent-pending interface synthesis technology automates a
tedious manual design task by targeting a number of standard and
proprietary hardware interfaces. Finally, Catapult automatically
generates SystemC transaction-level models (TLM) for high-speed
simulation and system-level verification. As a result, designers can
perform detailed "what-if" analysis on varying micro-architecture and
interface scenarios and achieve fully optimized hardware designs. The
Catapult tools' RTL output can be synthesized into gates using
industry-standard RTL synthesis products, enabling it to fit within a
wide variety of tool flows.
Pricing and Availability
The Catapult SL tool is priced at $350,000, and is currently
available in either term or perpetual licenses. Other members of the
Catapult product family are priced starting at $140,000. Visit
http://www.mentor.com/products/c-based_design for more information.
About Mentor Graphics
Mentor Graphics Corporation (Nasdaq:MENT) is a world leader in
electronic hardware and software design solutions, providing products,
consulting services and award-winning support for the world's most
successful electronics and semiconductor companies. Established in
1981, the company reported revenues over the last 12 months of over
$700 million and employs approximately 4,000 people worldwide.
Corporate headquarters are located at 8005 S.W. Boeckman Road,
Wilsonville, Oregon 97070-7777.World Wide Web site:
http://www.mentor.com/.
Mentor Graphics and Catapult are registered trademarks of Mentor
Graphics Corporation. All other company or product names are the
registered trademarks or trademarks of their respective owners.
Contact:
Mentor Graphics Corporation, Wilsonville
Nate James, 503-685-0449
Email Contact
Sonia Harrison, 503-685-1165
Email Contact
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